DF2170VTE33 Renesas Electronics America, DF2170VTE33 Datasheet - Page 307
![MCU 3V 256K 100-TQFP](/photos/28/61/286108/100-tqfp_sml.jpg)
DF2170VTE33
Manufacturer Part Number
DF2170VTE33
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2170BVTE33V.pdf
(572 pages)
Specifications of DF2170VTE33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2170VTE33
HD64F2170VTE33
HD64F2170VTE33
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2170VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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9.5.4
TCNT is cleared when compare match A or B occurs, depending on the setting of the CCLR1 and
CCLR0 bits in TCR. Figure 9.7 shows the timing of this operation.
9.5.5
TCNT is cleared at the rising edge of an external reset input, depending on the settings of the
CCLR1 and CCLR0 bits in TCR. The clear pulse width must be at least 1.5 states. Figure 9.8
shows the timing of this operation.
9.5.6
The OVF in TCSR is set to 1 when TCNT overflows (changes from H'FF to H'00). Figure 9.9
shows the timing of this operation.
φ
Compare match
signal
TCNT
φ
External reset
input pin
Clear signal
TCNT
Timing of Compare Match Clear
Timing of TCNT External Reset
Timing of Overflow Flag (OVF) Setting
Figure 9.8 Timing of Clearance by External Reset
Figure 9.7 Timing of Compare Match Clear
N–1
N
N
Rev. 2.00, 03/04, page 273 of 534
H'00
H'00
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