DF2170VTE33 Renesas Electronics America, DF2170VTE33 Datasheet - Page 220

• Manufacturer Part Number: DF2170VTE33
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2170VTE33; HD64F2170VTE33

7.4.8
The priority of the DMAC channels is: channel 0 > channel 1 > channel 2> channel 3. Table 7.3
shows the DMAC channel priority.
Table 7.3
If transfer requests occur simultaneously for a number of channels, the highest-priority channel
according to the priority in table 7.3 is selected for transfer.
Transfer Requests from Multiple Channels (Except Auto Request Cycle Steal Mode): If
transfer requests for different channels are issued during a transfer operation, the highest-priority
channel (excluding the currently transferring channel) is selected. The selected channel begins
transfer after the currently transferring channel releases the bus. If there is a bus request from a bus
master other than the DMAC at this time, a cycle for the other bus master is initiated. If there is no
other bus request, the bus is released for one cycle.
Channels are not switched during burst transfer or transfer of a block in block transfer mode.
Figure 7.13 shows an example of the transfer timing when transfer requests occur simultaneously
for channels 0, 1, and 2. The example in the figure is for external request cycle steal mode.
Rev. 2.00, 03/04, page 186 of 534
Channel
Channel 0
Channel 1
Channel 2
Channel 3
Channel Priority
DMAC Channel Priority
Priority
High
Low