DF2170VTE33 Renesas Electronics America, DF2170VTE33 Datasheet - Page 202

• Manufacturer Part Number: DF2170VTE33
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2170VTE33; HD64F2170VTE33

Rev. 2.00, 03/04, page 168 of 534
Bit
4
3
2
1
0
Bit Name
DARA4
DARA3
DARA2
DARA1
DARA0
Initial
Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Destination Address Repeat Area
These bits specify the destination address (DMDAR)
repeat area. The repeat area function updates the
specified lower address bits, leaving the remaining
upper address bits always the same.
A repeat area size of 2 bytes to 8 Mbytes can be
specified. The setting interval is a power-of-two number
of bytes.
When repeat area overflow results from incrementing or
decrementing an address, the lower address is the start
address of the repeat area in the case of address
incrementing, or the last address of the repeat area in
the case of address decrementing.
If the DARIE bit is set to 1, an interrupt can be
requested when repeat area overflow occurs.
00000: Not designated destination address (DMDAR)
00001: Lower 1 bit (2-byte area) in DMDAR designated
00010: Lower 2 bits (4-byte area) in DMDAR
00011: Lower 3 bits (8-byte area) designated as repeat
00100: Lower 4 bits (16-byte area) in DMDAR
10011: Lower 19 bits (512-kbyte area) in DMDAR
10100: Lower 20 bits (1-Mbyte area) in DMDAR
10101: Lower 21 bits (2-Mbyte area) in DMDAR
10110: Lower 22 bits (4-Mbyte area) in DMDAR
10111: Lower 23 bits (8-Mbyte area) in DMDAR
as repeat area
as repeat area
designated as repeat area
area
designated as repeat area
designated as repeat area
designated as repeat area
designated as repeat area
designated as repeat area
designated as repeat area
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