DF2170VTE33 Renesas Electronics America, DF2170VTE33 Datasheet - Page 16

• Manufacturer Part Number: DF2170VTE33
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2170VTE33; HD64F2170VTE33

8.10 Port A................................................................................................................................ 258
8.11 Pin Selection ..................................................................................................................... 261
Section 9 8-Bit Timer (TMR)............................................................................ 263
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
Rev. 2.00, 03/04, page xiv of xxxii
8.9.2
8.9.3
8.9.4
8.10.1 Port A Data Direction Register (PADDR)........................................................... 258
8.10.2 Port A Data Register (PADR).............................................................................. 258
8.10.3 Port A Register (PORTA).................................................................................... 259
8.10.4 Pin Functions ....................................................................................................... 259
8.11.1 Port Function Control Register 1 (PFCR1).......................................................... 261
8.11.2 IRQ Sense Port Select Register (ISSR) ............................................................... 262
Features............................................................................................................................. 263
Input/Output Pins.............................................................................................................. 265
Register Descriptions........................................................................................................ 265
9.3.1
9.3.2
9.3.3
9.3.4
9.3.5
Operation .......................................................................................................................... 270
9.4.1
Operation Timing.............................................................................................................. 271
9.5.1
9.5.2
9.5.3
9.5.4
9.5.5
9.5.6
Operation with Cascaded Connection............................................................................... 274
9.6.1
9.6.2
Interrupt Sources............................................................................................................... 275
9.7.1
Usage Notes ...................................................................................................................... 276
9.8.1
9.8.2
9.8.3
9.8.4
9.8.5
9.8.6
9.8.7
Port 9 Data Register (P9DR) ............................................................................... 255
Port 9 Register (PORT9)...................................................................................... 255
Pin Functions ....................................................................................................... 256
Timer Counter (TCNT)........................................................................................ 265
Time Constant Register A (TCORA) .................................................................. 266
Time Constant Register B (TCORB)................................................................... 266
Timer Control Register (TCR)............................................................................. 266
Timer Control/Status Register (TCSR)................................................................ 268
Pulse Output ........................................................................................................ 270
TCNT Incrementation Timing ............................................................................. 271
Timing of CMFA and CMFB Setting when Compare-Match Occurs ................. 272
Timing of Timer Output when Compare-Match Occurs...................................... 272
Timing of Compare Match Clear......................................................................... 273
Timing of TCNT External Reset.......................................................................... 273
Timing of Overflow Flag (OVF) Setting ............................................................. 273
16-Bit Counter Mode ........................................................................................... 274
Compare Match Count Mode .............................................................................. 275
Interrupt Sources.................................................................................................. 275
Contention between TCNT Write and Clear........................................................ 276
Contention between TCNT Write and Increment ................................................ 277
Contention between TCOR Write and Compare Match ...................................... 278
Contention between Compare Matches A and B ................................................. 279
Switching of Internal Clocks and TCNT Operation ............................................ 279
Mode Setting with Cascaded Connection ............................................................ 281
Interrupts in Module Stop Mode.......................................................................... 281