DF2170VTE33 Renesas Electronics America, DF2170VTE33 Datasheet - Page 353

MCU 3V 256K 100-TQFP

DF2170VTE33

Manufacturer Part Number
DF2170VTE33
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2170VTE33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2170VTE33
HD64F2170VTE33

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2170VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
This LSI incorporates a USB2 function module supporting the USB standard. Figure 12.1 shows
the block diagram of the USB2.
12.1
• Supports the USB version 2.0
• High-speed mode and full-speed mode are supported
• Supports four endpoints; EP0, EP1, EP2, and EP3
• Control, Bulk, and Interrupt transfers are supported
• The maximum packet size in high-speed mode and full-speed mode is switched automatically
• DMA transfer interface
• Interrupt interface
Endpoint
EP0s
EP0i
EP0o
EP1
EP2
EP3
USB standard requests are processed automatically (except for some requests)
Get Descriptor, Class, and Vendor requests are processed by firmware
DMA transfer is enabled for endpoints 1 and 2
Two interrupt requests (USBI0 and USBI1) are supported as the interrupt request output pins.
Each interrupt source can be assigned via the internal registers
Features
Full
Speed
8 bytes
64 bytes
64 bytes
64 bytes
64 bytes
64 bytes
Section 12 Universal Serial Bus 2 (USB2)
Max. Packet Size
High
Speed
8 bytes
64 bytes
64 bytes
512 bytes
512 bytes
64 bytes
FIFO
Configuration
Single
Single
Single
Dual
Dual
Single
Transfer
Method
Setup
Control
Control
Bulk
Bulk
Interrupt
Rev. 2.00, 03/04, page 319 of 534
Transfer
Direction
Out
In
Out
Out
In
In
DMA
Transfer
Possible
Possible

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