DF2170VTE33 Renesas Electronics America, DF2170VTE33 Datasheet - Page 371

• Manufacturer Part Number: DF2170VTE33
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2170VTE33; HD64F2170VTE33

12.3.19 Control Register (CTRL)
CTRL controls the USB module.
Bit
31 to 2 
1
0
Bit
31 to 2 
1
0
Bit Name
EP2DMAE 0
EP1DMAE 0
Bit Name
ASCE
PULLUPE 0
Initial
Value
All 0
Initial
Value
All 0
0
R/W
R
R/W
R/W
R/W
R
R/W
R/W
Description
Reserved
The write value should always be 0.
EP2 DMA Enable
Enables the DMA transfer for EP2.
EP1 DMA Enable
Enables the DMA transfer for EP1.
Description
Reserved
The write value should always be 0.
Automatic Stall Clear Enable
When this bit is set to 1, the stall handshake is returned
to the host and then the stall set bit (EPxSTL (x = 0, 1, 2,
3) bit in EPSTL0) for the returned endpoint is
automatically cleared. The automatic stall clear enabling
is common to all endpoints. This function cannot be
controlled individually for each endpoint. When this bit is
cleared to 0, the EPxSTL (x = 0, 1, 2, 3) bit is not
automatically cleared. The user needs to clear the
EPxSTL (x = 0, 1, 2, 3) bit.
To enable this bit, this bit should be set to 1 before the
EPxSTL (x = 0, 1, 2, 3) bit in EPSTL0 is set to 1.
Pull-Up Enable
Controls pull-up of the PHY complying with the UTMI. If 1
is written in this bit, pull-up is enabled for the PHY.
Rev. 2.00, 03/04, page 337 of 534