DF2170VTE33 Renesas Electronics America, DF2170VTE33 Datasheet - Page 332

MCU 3V 256K 100-TQFP

DF2170VTE33

Manufacturer Part Number
DF2170VTE33
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2170VTE33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2170VTE33
HD64F2170VTE33

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2170VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Rev. 2.00, 03/04, page 298 of 534
Bit
5
4
Bit Name
ORER
FER
Initial
Value
0
0
R/W
R/(W)* Overrun Error
R/(W)* Framing Error
Description
Indicates that an overrun error occurred while receiving
and the reception has ended abnormally.
[Setting condition]
The receive data prior to the overrun error is retained in
RDR, and the data received subsequently is lost. Also,
subsequent serial reception cannot be continued while
the ORER flag is set to 1.
[Clearing condition]
The ORER flag is not affected and retains its previous
state when the RE bit in SCR is cleared to 0.
Indicates that a framing error occurred while receiving
in asynchronous mode and the reception has ended
abnormally.
[Setting condition]
In 2-stop-bit mode, only the first stop bit is checked for a
value of 0; the second stop bit is not checked. If a
framing error occurs, the receive data is transferred to
RDR but the RDRF flag is not set. Also, subsequent
serial reception cannot be continued while the FER flag
is set to 1.
[Clearing condition]
The FER flag is not affected and retains its previous
state when the RE bit in SCR is cleared to 0.
When the next serial reception is completed while
RDRF = 1
When 0 is written to ORER after reading ORER = 1
When the stop bit is 0
When 0 is written to FER after reading FER = 1

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