r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 997

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
22.2.2
STBCR2 is an 8-bit readable/writable register that controls the operation of modules in power-
down modes. STBCR2 is initialized to H'00 by a power-on reset but retains its previous value by a
manual reset or in software standby mode. Only byte access is valid.
Note: See section 22.4, Usage Notes, when writing data to this register.
Bit
7
6
5
4 to 0
Standby Control Register 2 (STBCR2)
Bit Name
MSTP10
MSTP9
MSTP8
Initial value:
Initial
Value
0
0
0
All 0
R/W:
Bit:
MSTP
R/W
10
7
0
R/W
R/W
R/W
R/W
R
MSTP
R/W
6
0
9
MSTP
R/W
Description
Module Stop 10
When the MSTP10 bit is set to 1, the supply of the
clock to the H-UDI is halted.
0: H-UDI runs.
1: Clock supply to H-UDI halted.
Module Stop 9
When the MSTP9 bit is set to 1, the supply of the
clock to the UBC is halted.
0: UBC runs.
1: Clock supply to UBC halted.
Module Stop 8
When the MSTP8 bit is set to 1, the supply of the
clock to the DMAC is halted.
0: DMAC runs.
1: Clock supply to DMAC halted.
Reserved
These bits are always read as 0. The write value
should always be 0.
5
8
0
R
4
0
-
R
3
0
-
Rev. 2.00 Dec. 09, 2005 Page 973 of 1152
R
2
0
-
R
1
0
-
Section 22 Power-Down Modes
R
0
0
-
REJ09B0191-0200

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