r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 381

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

The DMAC can be used in place of the CPU to perform high-speed transfers between external
devices that have DACK (transfer request acknowledge signal), external memory, on-chip
memory, memory-mapped external devices, and on-chip peripheral modules.
9.1
• Number of channels: Eight channels (channels 0 to 7) selectable
• 4-Gbyte physical address space
• Data transfer unit is selectable: Byte, word (two bytes), longword (four bytes), and 16 bytes
• Maximum transfer count: 16,777,216 transfers (24 bits)
• Address mode: Dual address mode and single address mode are supported.
• Transfer requests
• Selectable bus modes
• Selectable channel priority levels: The channel priority levels are selectable between fixed
• Interrupt request: An interrupt request can be sent to the CPU on completion of half- or full-
• External request detection: There are following four types of DREQ input detection.
Four channels (channels 0 to 3) can receive external requests.
(longword × 4)
 External request
 On-chip peripheral module request
 Auto request
The following modules can issue on-chip peripheral module requests.
 Eight SCIF sources, two IIC3 sources, two A/D converter sources, five MTU2 sources, and
 Cycle steal mode (normal mode and intermittent mode)
 Burst mode
mode and round-robin mode.
data transfer. Through the HE and HIE bits in CHCR, an interrupt is specified to be issued to
the CPU when half of the initially specified DMA transfer is completed.
 Low level detection
 High level detection
 Rising edge detection
 Falling edge detection
Section 9 Direct Memory Access Controller (DMAC)
two CMT sources
Features
Section 9 Direct Memory Access Controller (DMAC)
Rev. 2.00 Dec. 09, 2005 Page 357 of 1152
REJ09B0191-0200