r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 696

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 12 Port Output Enable 2 (POE2)
Notes: 1. Only 0 can be written to clear the flag after 1 is read.
12.3.3
ICSR2 is a 16-bit readable/writable register that selects the POE4 to POE7 pin input modes,
controls the enable/disable of interrupts, and indicates status.
Rev. 2.00 Dec. 09, 2005 Page 672 of 1152
REJ09B0191-0200
Initial value:
Bit
7 to 0
Bit
15
Notes:
R/W:
Bit:
2. Can be modified only once after a power-on reset.
1.
2.
Bit Name
Bit Name

POE7F
Input Level Control/Status Register 2 (ICSR2)
POE7F POE6F POE5F POE4F
R/(W)*
Only 0 can be written to clear the flag after 1 is read.
Can be modified only once after a power-on reset.
15
0
1
R/(W)*
14
0
1
R/(W)*
Initial
Value
All 0
Initial
Value
0
13
0
1
R/(W)*
12
0
1
R/W
R
R/W
R/(W)*
11
R
0
-
1
10
R
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Description
POE7 Flag
Indicates that a high impedance request has been input
to the POE7 pin.
[Clearing conditions]
•
•
[Setting condition]
•
By writing 0 to POE7F after reading POE7F = 1
(when the falling edge is selected by bits 7 and 6 in
ICSR2)
By writing 0 to POE7F after reading POE7F = 1 after
a high level input to POE7 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 7 and 6 in ICSR2)
When the input condition set by bits 7 and 6 in ICSR2
occurs at the POE7 pin
R
9
0
-
R/W R/W*
PIE2
8
0
POE7M[1:0]
7
0
2
R/W*
6
0
2
R/W*
POE6M[1:0]
5
0
2
R/W*
4
0
2
R/W*
POE5M[1:0]
3
0
2
R/W*
2
0
2
R/W*
POE4M[1:0]
0
1
2
R/W*
0
0
2