r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 970

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 20 I/O Ports
20.3.2
PBDR is a 16-bit readable/writable register that stores port B data. Bits PB9DR and PB5DR to
PB2DR correspond to pins PB9/IRQ7/A21/ADTRG/POE8 and PB5/IRQ3/POE3/CASL to
PB2/IRQ0/POE0/SCL, respectively.
When a pin function is general output, if a value is written to PBDR, that value is output directly
from the pin, and if PBDR is read, the register value is returned directly regardless of the pin state.
When a pin function is general input, if PBDR is read, the pin state, not the register value, is
returned directly. If a value is written to PBDR, although that value is written into PBDR, it does
not affect the pin state. Table 20.4 summarizes PBDR read/write operations.
PBDR is initialized to the value shown in table 20.3 by a power-on reset. PBDR is not initialized
by a manual reset or in sleep mode or software standby mode.
Initial value:
Rev. 2.00 Dec. 09, 2005 Page 946 of 1152
REJ09B0191-0200
Bit
15 to 10
9
8 to 6
5
4
3
2
1, 0
Note:
R/W:
Bit:
*
Port B Data Register (PBDR)
Depends on the external pin state.
Bit Name
—
PB9DR

PB5DR
PB4DR
PB3DR
PB2DR

15
R
0
-
14
R
0
-
13
Initial
Value
All 0
0

0
0
Pin state R
Pin state R

R
0
-
12
R
0
-
R/W
R
R/W
R
R/W
R/W
R
11
R
0
-
10
R
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
See table 20.4
Reserved
These bits are always read as undefined values. The
write value should always be 0.
See table 20.4
Reserved
These bits are always read as undefined values. The
write value should always be 0.
R/W
PB9
DR
9
0
R
8
-
-
R
7
-
-
R
6
-
-
R/W
PB5
DR
5
0
R/W
PB4
DR
4
0
PB3
DR
R
3
*
PB2
DR
R
2
*
R
1
-
-
R
0
-
-