r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 373

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Table 8.21 Number of Idle Cycles Inserted between Access Cycles to Different Memory
Previous Cycle SRAM
SRAM
Burst ROM
(asynchronous)
MPX-I/O
Byte SRAM
(BAS = 0)
Byte SRAM
(BAS = 1)
SDRAM
SDRAM
(low-frequency
mode)
PCMCIA
Burst MPX
Burst ROM
(synchronous)
Figure 8.55 shows sample estimation of idle cycles between access cycles. In the actual operation,
the idle cycles may become shorter than the estimated value due to the write buffer effect or may
become longer due to internal bus idle cycles caused by stalling in the pipeline due to CPU
instruction execution or CPU register conflicts. Please consider these errors when estimating the
idle cycles.
Types
0
0
1
0
1
1
1.5
0
0
0
Burst ROM
(Asynchronous)
0
0
1
0
1
1
1.5
0
0
0
MPX-
I/O
1
0
1
2
2.5
1
1
1
2
1
Byte
SRAM
(BAS =
0)
0
0
1
0
1
1
1.5
0
0
0
Byte
SRAM
(BAS =
1)
1
1
1
1
0
0
0.5
1
1
1
Next Cycle
SDRAM
1
1
1
1
0
0

1
1
1
Rev. 2.00 Dec. 09, 2005 Page 349 of 1152
SDRAM
(Low-
Frequency
Mode)
1.5
1.5
1.5
1.5
1.5

1
1.5
1.5
1.5
Section 8 Bus State Controller (BSC)
PCMCIA
0
0
1
0
1
1
1.5
0
0
0
Burst
MPX
0
0
1
0
1
1
1.5
0
0
0
REJ09B0191-0200
Burst ROM
(Synchronous)
0
0
1
0
1
1
1.5
0
0
0