r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 116
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r5s72060w200fpv
Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S72060W200FPV.pdf
(1180 pages)
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Part Number:
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Section 4 Exception Handling
Note:
Table 4.4
Notes: 1. Vector table address offset: See table 4.3.
Rev. 2.00 Dec. 09, 2005 Page 92 of 1152
REJ09B0191-0200
Exception Sources
Integer division exception
(division by zero)
Integer division exception (overflow)
(Reserved by system)
Trap instruction (user vector)
External interrupts (IRQ, PINT),
on-chip peripheral module interrupts*
Exception Source
Resets
Address errors, register bank
errors, interrupts, instructions
*
2. Vector number: See table 4.3.
The vector numbers and vector table address offsets for each external interrupt and on-
chip peripheral module interrupt are given in table 5.4 in section 5, Interrupt Controller
(INTC).
Calculating Exception Handling Vector Table Addresses
Vector Table Address Calculation
Vector table address = (vector table address offset)
Vector table address = VBR + (vector table address offset)
Vector
Numbers
17
18
19
31
32
63
64
511
:
:
:
= (vector number) × 4
= VBR + (vector number) × 4
Vector Table Address Offset
H'00000044 to H'00000047
H'00000048 to H'0000004B
H'0000004C to H'0000004F
H'0000007C to H'0000007F
H'00000080 to H'00000083
H'000000FC to H'000000FF
H'00000100 to H'00000103
H'000007FC to H'000007FF
:
:
:
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