r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 860

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 17 A/D Converter (ADC)
17.3.3
ADCR is a 16-bit readable/writable register that selects the simultaneous sampling of two
channels.
ADCR is initialized to H'0000 by a power-on reset or in software standby mode or module
standby mode.
Initial value:
Rev. 2.00 Dec. 09, 2005 Page 836 of 1152
REJ09B0191-0200
Bit
15
14 to 0
R/W:
Bit:
A/D0, A/D1 Control Register (ADCR)
DSMP
Bit Name
DSMP

R/W
15
0
14
R
0
-
13
R
0
-
Initial
Value
0
All 0
12
R
0
-
11
R
0
-
R/W
R/W
R
10
R
0
-
Description
Simultaneous Sampling Operation Select
Selects A/D0 and A/D1 simultaneous sampling. Starts
simultaneous sampling of two channels when this bit is
set to 1. This bit remains set to 1 during A/D
conversion.
This bit is automatically cleared to 0 when A/D
conversion ends on all selected channels for each
operating mode.
Note: Set ADCSR before setting this bit.
Reserved
These bits are always read as 0. The write value should
always be 0.
R
9
0
-
R
8
0
-
R
7
0
-
R
6
0
-
R
5
0
-
R
4
0
-
R
3
0
-
R
2
0
-
R
1
0
-
R
0
0
-