r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 104

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 3 Clock Pulse Generator (CPG)
Rev. 2.00 Dec. 09, 2005 Page 80 of 1152
REJ09B0191-0200
Bit
11
10 to 8
7
6 to 4
3
Bit Name

STC[2:0]

IFC[2:0]
RNGS
Initial
Value
0
000
0
000
0
R/W
R
R/W
R
R/W
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Frequency multiplication ratio of PLL circuit 1
000: × 1 time
001: × 2 times
010: × 3 times
011: × 4 times
100: × 6 times
101: × 8 times
Reserved
This bit is always read as 0. The write value should
always be 0.
Internal Clock Frequency Division Ratio
These bits specify the frequency division ratio of the
internal clock with respect to the output frequency of
PLL circuit 1.
000: × 1 time
001: × 1/2 time
010: × 1/3 time
011: × 1/4 time
100: × 1/6 time
101: × 1/8 time
PLL Circuit 1 Output Range Select
Set this bit according to the output frequency of PLL
circuit 1 when the multiplication ratio of PLL circuit 1 is
set to 3 times. When any other multiplication ratio is
set, clear this bit to 0.
0: Low frequency mode
1: High frequency mode
(when output frequency of PLL circuit 1 is 120 MHz
or less)
(when multiplication ratio of PLL circuit 1 is 3 times
while its output frequency exceeds 120 MHz)