r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 486

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
10.3.10 Timer A/D Converter Start Request Control Register (TADCR)
TADCR is a 16-bit readable/writable register that enables or disables A/D converter start requests
and specifies whether to link A/D converter start requests with interrupt skipping operation. The
MTU2 has one TADCR in channel 4.
Initial value:
Rev. 2.00 Dec. 09, 2005 Page 462 of 1152
REJ09B0191-0200
Bit
15, 14
13 to 8 —
7
6
Note:
R/W:
Bit:
*
Do not set to 1 when complementary PWM mode is not selected.
Bit Name
BF[1:0]
UT4AE
DT4AE
R/W
15
0
BF[1:0]
R/W
14
0
13
R
0
-
Initial
Value
00
All 0
0
0*
12
R
0
-
11
R
0
-
R/W
R/W
R
R/W
R/W
10
R
0
-
Description
TADCOBRA_4/TADCOBRB_4 Transfer Timing Select
Select the timing for transferring data from
TADCOBRA_4 and TADCOBRB_4 to TADCORA_4
and TADCORB_4.
For details, see table 10.29.
Reserved
These bits are always read as 0. The write value should
always be 0.
Up-Count TRG4AN Enable
Enables or disables A/D converter start requests
(TRG4AN) during TCNT_4 up-count operation.
0: A/D converter start requests (TRG4AN) disabled
1: A/D converter start requests (TRG4AN) enabled
Down-Count TRG4AN Enable
Enables or disables A/D converter start requests
(TRG4AN) during TCNT_4 down-count operation.
0: A/D converter start requests (TRG4AN) disabled
1: A/D converter start requests (TRG4AN) enabled
R
9
0
-
during TCNT_4 up-count operation
during TCNT_4 up-count operation
during TCNT_4 down-count operation
during TCNT_4 down-count operation
R
8
0
-
UT4AE DT4AE UT4BE DT4BE ITA3AE ITA4VE ITB3AE ITB4VE
R/W
7
0
R/W
0*
6
R/W
5
0
R/W
0*
4
R/W
0*
3
R/W
0*
2
R/W
0*
1
R/W
0*
0