r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 813

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
16.3.1
ICCR1 is an 8-bit readable/writable register that enables or disables the I
controls transmission or reception, and selects master or slave mode, transmission or reception,
and transfer clock frequency in master mode.
ICCR1 is initialized to H'00 by a power-on reset.
Bit
7
6
I
2
Bit Name
ICE
RCVD
C Bus Control Register 1 (ICCR1)
Initial value:
Initial
Value
0
0
R/W:
Bit:
R/W
ICE
7
0
R/W
R/W
R/W
RCVD
R/W
6
0
Description
I
0: This module is halted. (SCL and SDA pins function
1: This bit is enabled for transfer operations. (SCL and
Reception Disable
Enables or disables the next operation when TRS is 0
and ICDRR is read.
0: Enables next reception
1: Disables next reception
R/W
MST
2
C Bus Interface 3 Enable
5
0
as ports.)
SDA pins are bus drive state.)
R/W
TRS
4
0
R/W
3
0
Rev. 2.00 Dec. 09, 2005 Page 789 of 1152
R/W
2
0
CKS[3:0]
Section 16 I
R/W
1
0
R/W
2
C bus interface 3,
0
0
2
C Bus Interface 3 (IIC3)
REJ09B0191-0200

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