r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 347

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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• Deep power-down mode
If the RMODE bit in the SDCR is set to 1 while the DEEP and RFSH bits in the SDCR are set to
1, the low-power SDRAM enters the deep power-down mode. If the RMODE bit is cleared to 0,
the CKE signal is pulled high to cancel the deep power-down mode. Before executing an access
after returning from the deep power-down mode, the power-up sequence must be re-executed.
The low-power SDRAM supports the deep power-down mode as a low-power consumption
mode. In the partial self-refresh function, self-refresh is performed on a specific area. In the
deep power-down mode, self-refresh will not be performed on any memory area. This mode is
effective in systems where all of the system memory areas are used as work areas.
RASL, RASU
CASL, CASU
A12/A11*
D31 to D0
A25 to A0
DACKn*
RD/WR
DQMxx
CKIO
CKE
CSn
BS
1
2
Figure 8.35 Deep Power-Down Mode Transition Timing
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
Tp
2. The waveform for DACKn is when active low is specified.
Tpw
Tdpd
Trc
Rev. 2.00 Dec. 09, 2005 Page 323 of 1152
Trc
Section 8 Bus State Controller (BSC)
Hi-Z
Trc
Trc
Trc
REJ09B0191-0200

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