r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 752

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 Serial Communication Interface with FIFO (SCIF)
15.3.5
SCSMR specifies the SCIF serial communication format and selects the clock source for the baud
rate generator.
The CPU can always read and write to SCSMR. SCSMR is initialized to H'0000 by a power-on
reset.
Initial value:
Rev. 2.00 Dec. 09, 2005 Page 728 of 1152
REJ09B0191-0200
Bit
15 to 8
7
6
R/W:
Bit:
Serial Mode Register (SCSMR)
Bit Name

C/A
CHR
15
R
0
-
14
R
0
-
13
R
0
-
Initial
Value
All 0
0
0
12
R
0
-
11
R/W
R
R/W
R/W
R
0
-
10
R
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Communication Mode
Selects whether the SCIF operates in asynchronous or
clocked synchronous mode.
0: Asynchronous mode
1: Clocked synchronous mode
Character Length
Selects 7-bit or 8-bit data length in asynchronous mode.
In the clocked synchronous mode, the data length is
always 8 bits, regardless of the CHR setting.
0: 8-bit data
1: 7-bit data*
Note: *
R
9
0
-
When 7-bit data is selected, the MSB (bit 7) of
the transmit FIFO data register is not
transmitted.
R
8
0
-
R/W
C/A
7
0
R/W
CHR
6
0
R/W
PE
5
0
R/W
O/E
4
0
STOP
R/W
3
0
R
2
0
-
R/W
1
0
CKS[1:0]
R/W
0
0