r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 738

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 14 Watchdog Timer (WDT)
14.4
14.4.1
The WDT can be used to cancel software standby mode with an interrupt such as an NMI
interrupt. The procedure is described below. (The WDT does not operate when resets are used for
canceling, so keep the RES or MRES pin low until clock oscillation settles.)
1. Before making a transition to software standby mode, always clear the TME bit in WTCSR
2. Set the type of count clock used in the CKS[2:0] bits in WTCSR and the initial value of the
3. After setting the STBY bit of the standby control register (STBCR: see section 22, Power-
4. The WDT starts counting by detecting the edge change of the NMI signal.
5. When the WDT count overflows, the CPG starts supplying the clock and this LSI resumes
Rev. 2.00 Dec. 09, 2005 Page 714 of 1152
REJ09B0191-0200
to 0. When the TME bit is 1, an erroneous reset or interval timer interrupt may be generated
when the count overflows.
counter in WTCNT. These values should ensure that the time till count overflow is longer than
the clock oscillation settling time.
Down Modes) to 1, the execution of a SLEEP instruction puts the system in software standby
mode and clock operation then stops.
operation. The WOVF flag in WRCSR is not set when this happens.
WDT Usage
Canceling Software Standby Mode

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