r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 693

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Bit
12
11 to 9 
8
7, 6
Bit Name
POE0F
PIE1
POE3M[1:0] 00
Initial
Value
0
All 0
0
R/W
R/(W)*
R
R/W
R/W*
2
1
Description
POE0 Flag
Indicates that a high impedance request has been input
to the POE0 pin.
[Clear conditions]
•
•
[Set condition]
•
Reserved
These bits are always read as 0. The write value should
always be 0.
Port Interrupt Enable 1
Enables or disables interrupt requests when any one of
the POE0F to POE3F bits of the ICSR1 is set to 1.
0: Interrupt requests disabled
1: Interrupt requests enabled
POE3 Mode
These bits select the input mode of the POE3 pin.
00: Accept request on falling edge of POE3 input
01: Accept request when POE3 input has been sampled
10: Accept request when POE3 input has been sampled
11: Accept request when POE3 input has been sampled
By writing 0 to POE0F after reading POE0F = 1
(when the falling edge is selected by bits 1 and 0 in
ICSR1)
By writing 0 to POE0F after reading POE0F = 1 after
a high level input to POE0 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 1 and 0 in ICSR1)
When the input set by bits 1 and 0 in ICSR1 occurs at
the POE0 pin
for 16 Pφ/8 clock pulses and all are low level.
for 16 Pφ/16 clock pulses and all are low level.
for 16 Pφ/128 clock pulses and all are low level.
Rev. 2.00 Dec. 09, 2005 Page 669 of 1152
Section 12 Port Output Enable 2 (POE2)
REJ09B0191-0200