r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 106

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 3 Clock Pulse Generator (CPG)
3.4.2
MCLKCR is an 8-bit readable/writable register. Only byte access can be used on MCLKCR.
MCLKCR is initialized to H'43 only by a power-on reset. MCLKCR retains its previous value by
a manual reset or in software standby mode.
Rev. 2.00 Dec. 09, 2005 Page 82 of 1152
REJ09B0191-0200
Bit
7, 6
5 to 2
1, 0
MTU Clock Frequency Control Register (MCLKCR)
Bit Name
MSSCS[1:0] 01

MSDIVS[1:0] 11
Initial value:
Initial
Value
All 0
R/W:
Bit:
R/W
MSSCS[1:0]
7
0
R/W
R/W
R
R/W
R/W
6
1
Description
Source Clock Select
These bits select the source clock.
00: Clock stop
01: PLL1 output clock
10: Reserved (setting prohibited)
11: Reserved (setting prohibited)
Reserved
These bits are always read as 0. The write value
should always be 0.
Division Ratio Select
These bits specify the frequency division ratio of the
source clock. Set these bits so that the output clock is
100 MHz or less, and also an integer multiple of the
peripheral clock frequency (Pφ).
00: × 1 time
01: × 1/2 time
10: × 1/3 time
11: × 1/4 time
R
5
0
-
R
4
0
-
R
3
0
-
R
2
0
-
R/W
MSDIVS[1:0]
1
1
R/W
0
1