r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 89

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
Notes: 1. Instruction execution cycles: The execution cycles shown in the table are minimums. In
Instruction
STC
STC
STC.L
STC.L
STC.L
STS
STS
STS
STS.L
STS.L
STS.L
TRAPA
*
GBR,Rn
VBR,Rn
SR,@-Rn
GBR,@-Rn
VBR,@-Rn
MACH,Rn
MACL,Rn
PR,Rn
MACH,@-Rn
MACL,@-Rn
PR,@-Rn
#imm
practice, the number of instruction execution states in cases such as the following:
a. When there is a conflict between an instruction fetch and a data access
b. When the destination register of a load instruction (memory → register) is the same
In the event of bank overflow, the number of cycles is 19.
as the register used by the next instruction.
Instruction Code
0000nnnn00010010
0000nnnn00100010
0100nnnn00000011
0100nnnn00010011
0100nnnn00100011
0000nnnn00001010
0000nnnn00011010
0000nnnn00101010
0100nnnn00000010
0100nnnn00010010
0100nnnn00100010
11000011iiiiiiii
Operation
GBR → Rn
VBR → Rn
Rn-4 → Rn, SR → (Rn)
Rn-4 → Rn, GBR → (Rn)
Rn-4 → Rn, VBR → (Rn)
MACH → Rn
MACL → Rn
PR → Rn
Rn-4 → Rn, MACH → (Rn)
Rn-4 → Rn, MACL → (Rn)
Rn-4 → Rn, PR → (Rn)
PC/SR → stack area,
(imm × 4 + VBR) → PC
Rev. 2.00 Dec. 09, 2005 Page 65 of 1152
Execu-
tion
Cycles
1
1
2
1
1
1
1
1
1
1
1
5
T Bit
SH2,
SH2E SH4
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
REJ09B0191-0200
Section 2 CPU
Compatibility
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
SH-2A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes

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