r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 506

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Table 10.38 TIOC4B Output Level Select Function
10.3.22 Timer Output Level Buffer Register (TOLBR)
TOLBR is an 8-bit readable/writable register that functions as a buffer for TOCR2 and specifies
the PWM output level in complementary PWM mode and reset-synchronized PWM mode.
Rev. 2.00 Dec. 09, 2005 Page 482 of 1152
REJ09B0191-0200
Bit 0
OLS1P
0
1
Bit
7, 6
5
4
3
2
1
0
Bit Name
—
OLS3N
OLS3P
OLS2N
OLS2P
OLS1N
OLS1P
Initial Output
High level
Low level
Initial value:
Initial
value
All 0
0
0
0
0
0
0
R/W:
Bit:
Active Level
Low level
High level
R
7
0
-
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R
6
0
-
OLS3N OLS3P OLS2N OLS2P OLS1N OLS1P
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Specifies the buffer value to be transferred to the
OLS3N bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS3P bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS2N bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS2P bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS1N bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS1P bit in TOCR2.
R/W
5
0
Up Count
Low level
High level
R/W
Function
4
0
R/W
3
0
Compare Match Output
R/W
2
0
R/W
1
0
R/W
0
0
Down Count
High level
Low level