r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 785

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
(1)
Table 15.11 lists the eight communication formats that can be selected in asynchronous mode. The
format is selected by settings in the serial mode register (SCSMR).
Table 15.11 Serial Communication Formats (Asynchronous Mode)
[Legend]
START: Start bit
STOP: Stop bit
P:
(2)
An internal clock generated by the on-chip baud rate generator or an external clock input from the
SCK pin can be selected as the SCIF transmit/receive clock. The clock source is selected by the
C/A bit in the serial mode register (SCSMR) and bits CKE[1:0] in the serial control register
(SCSCR). For clock source selection, refer to table 15.10, SCSMR and SCSCR Settings and SCIF
Clock Source Selection.
When an external clock is input at the SCK pin, it must have a frequency equal to 16 times the
desired bit rate.
When the SCIF operates on an internal clock, it can output a clock signal on the SCK pin. The
frequency of this output clock is 16 times the desired bit rate.
CHR PE STOP
0
0
0
0
1
1
1
1
SCSMR Bits
Transmit/Receive Formats
Clock
Parity bit
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
START
START
START
START
START
START
START
START
1
2
Serial Transmit/Receive Format and Frame Length
3
4
Section 15 Serial Communication Interface with FIFO (SCIF)
7-bit data
7-bit data
7-bit data
7-bit data
8-bit data
8-bit data
8-bit data
8-bit data
5
6
Rev. 2.00 Dec. 09, 2005 Page 761 of 1152
7
8
STOP
STOP STOP
9
P
P
STOP
STOP STOP
STOP
STOP STOP
10
P
P
REJ09B0191-0200
STOP
STOP STOP
11
12

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