r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 529
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r5s72060w200fpv
Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S72060W200FPV.pdf
(1180 pages)
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• When TGR is an input capture register
(1)
Figure 10.16 shows an example of the buffer operation setting procedure.
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 10.15.
Example of Buffer Operation Setting Procedure
Figure 10.16 Example of Buffer Operation Setting Procedure
Select TGR function
Set buffer operation
Input capture
signal
<Buffer operation>
Buffer operation
register
Buffer
Start count
Figure 10.15 Input Capture Buffer Operation
[1]
[2]
[3]
Timer general
[1] Designate TGR as an input capture register or
[2] Designate TGR for buffer operation with bits
[3] Set the CST bit in TSTR to 1 start the count
register
output compare register by means of TIOR.
BFA and BFB in TMDR.
operation.
Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 2.00 Dec. 09, 2005 Page 505 of 1152
TCNT
REJ09B0191-0200
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