r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 991

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

This LSI has an on-chip RAM module which can be used to store instructions or data.
On-chip RAM operation and write access to the RAM can be enabled or disabled through the
RAM enable bits and RAM write enable bits.
21.1
• Pages
• Memory map
Table 21.1 On-Chip RAM Address Spaces
• Ports
• Priority
Page
Page 0
Page 1
Page 2
Page 3
The on-chip RAM is divided into four pages (pages 0 to 3).
The on-chip RAM is located in the address spaces shown in table 21.1.
Each page has two independent read and write ports and is connected to the internal bus (I
bus), CPU instruction fetch bus (F bus), and CPU memory access bus (M bus). (Note that the F
bus is connected only to the read ports.)
The F bus and M bus are used for access by the CPU, and the I bus is used for access by the
DMAC.
When the same page is accessed from different buses simultaneously, the access is processed
according to the priority. The priority is I bus > M bus > F bus.
Features
Section 21 On-Chip RAM
Address
H'FFF80000 to H'FFF87FFF
H'FFF88000 to H'FFF8FFFF
H'FFF90000 to H'FFF97FFF
H'FFF98000 to H'FFF9FFFF
Rev. 2.00 Dec. 09, 2005 Page 967 of 1152
Section 21 On-Chip RAM
REJ09B0191-0200