r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 819

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
Bit
2 to 0
Bit Name
BC[2:0]
Initial
Value
000
R/W
R/W
Description
Bit Counter
These bits specify the number of bits to be transferred
next. When read, the remaining number of transfer bits
is indicated. With the I
transferred with one addition acknowledge bit. Should
be made between transfer frames. If these bits are set
to a value other than B'000, the setting should be made
while the SCL pin is low. The value returns to B'000 at
the end of a data transfer, including the acknowledge
bit. These bits are cleared by a power-on reset and in
software standby mode and module standby mode.
These bits are also cleared by setting the IICRST bit of
ICCR2 to 1. With the clocked synchronous serial
format, these bits should not be modified.
I
000: 9 bits
001: 2 bits
010: 3 bits
011: 4 bits
100: 5 bits
101: 6 bits
110: 7 bits
111: 8 bits
2
C Bus Format
Rev. 2.00 Dec. 09, 2005 Page 795 of 1152
Clocked Synchronous Serial Format
000: 8 bits
001: 1 bit
010: 2 bits
011: 3 bits
100: 4 bits
101: 5 bits
110: 6 bits
111: 7 bits
2
C bus format, the data is
Section 16 I
2
C Bus Interface 3 (IIC3)
REJ09B0191-0200

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