r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 849

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

16.7
Issue the stop condition or start (re-transmit) condition after recognizing the falling edge of the
ninth clock. The falling edge of the ninth clock can be recognized by checking the SCLO bit in the
I2C control register 2 (ICCR2). Note that if the stop condition or start (re-transmit) condition is
issued in a particular timing and the situations shown below, these conditions may not correctly
output. No problem will occur otherwise.
1. The rising edge of the SCL becomes less sharp and longer due to the SCL bus load (load
2. When the slave device elongates the low level period between the eighth and ninth clocks and
capacitor and pull-up resistor) than the period defined in section 16.6, Bit Synchronous Circuit.
activates the bit synchronous circuit.
Usage Notes
Rev. 2.00 Dec. 09, 2005 Page 825 of 1152
Section 16 I
2
C Bus Interface 3 (IIC3)
REJ09B0191-0200