mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 903

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mcf51jf128

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mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 38
Serial Peripheral Interface (SPI)
38.1 Introduction
The serial peripheral interface (SPI) module provides for full-duplex, synchronous, serial
communication between the MCU and peripheral devices. These peripheral devices can
include other microcontrollers, analog-to-digital converters, shift registers, sensors, and
memories, among others.
The SPI runs at a baud rate up to the bus clock divided by two in master mode and up to
the bus clock divided by four in slave mode. Software can poll the status flags, or SPI
operation can be interrupt driven.
The SPI also supports a data length of 8 or 16 bits and includes a hardware match feature
for the receive data buffer.
The SPI includes an internal DMA interface to support continuous SPI transmission
through an on-chip DMA controller instead of through the CPU. This feature decreases
CPU loading, allowing CPU time to be used for other work.
38.1.1 Features
The SPI includes these distinctive features:
Freescale Semiconductor, Inc.
• Master mode or slave mode operation
• Full-duplex or single-wire bidirectional mode
• Programmable transmit bit rate
• Double-buffered transmit and receive data register
For the actual maximum SPI baud rate, refer to the Chip
Configuration details and to the device’s Data Sheet.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
NOTE
903

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