mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 498

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Registers
The CCIF, RDCOLERR, ACCERR, and FPVIOL bits are readable and writable. The
MGSTAT0 bit is read only. The unassigned bits read 0 and are not writable.
Address: FTFL_FSTAT is FFFF_84E0h base + 3h offset = FFFF_84E3h
498
RDCOLERR
ACCERR
FPVIOL
CCIF
Reset
Field
Read
Write
7
6
5
4
Bit
When set, the Access Error (ACCERR) and Flash Protection
Violation (FPVIOL) bits in this register prevent the launch of
any more commands until the flag is cleared (by writing a one
to it).
CCIF
w1c
Command Complete Interrupt Flag
The CCIF flag indicates that a FTFL command has completed. The CCIF flag is cleared by writing a 1 to
CCIF to launch a command, and CCIF stays low until command completion or command violation.
The CCIF bit is reset to 0 but is set to 1 by the memory controller at the end of the reset initialization
sequence. Depending on how quickly the read occurs after reset release, the user may or may not see
the 0 hardware reset value.
0
1
FTFL Read Collision Error Flag
The RDCOLERR error bit indicates that the MCU attempted a read from an FTFL resource that was being
manipulated by an FTFL command (CCIF=0). Any simultaneous access is detected as a collision error by
the block arbitration logic. The read data in this case cannot be guaranteed. The RDCOLERR bit is
cleared by writing a 1 to it. Writing a 0 to RDCOLERR has no effect.
0
1
Flash Access Error Flag
The ACCERR error bit indicates an illegal access has occurred to an FTFL resource caused by a violation
of the command write sequence or issuing an illegal FTFL command. While ACCERR is set, the CCIF
flag cannot be cleared to launch a command. The ACCERR bit is cleared by writing a 1 to it. Writing a 0 to
the ACCERR bit has no effect.
0
1
Flash Protection Violation Flag
7
0
FTFL command in progress
FTFL command has completed
No collision error detected
Collision error detected
No access error detected
Access error detected
RDCOLERR
w1c
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
FTFL_FSTAT field descriptions
ACCERR
Table continues on the next page...
w1c
0
5
Preliminary
NOTE
FPVIOL
w1c
0
4
Description
0
3
0
0
2
Freescale Semiconductor, Inc.
0
1
MGSTAT0
0
0