mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1033

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

42.3.7 I2C Programmable Input Glitch Filter register (I2Cx_FLT)
Addresses: I2C0_FLT is FFFF_81C0h base + 6h offset = FFFF_81C6h
Freescale Semiconductor, Inc.
Reserved
AD[10:8]
RMEN
SBRC
Field
Reset
Field
FLT
2–0
Read
7–4
3–0
Write
4
3
Bit
I2C1_FLT is FFFF_81D0h base + 6h offset = FFFF_81D6h
I2C2_FLT is FFFF_81E0h base + 6h offset = FFFF_81E6h
I2C3_FLT is FFFF_81F0h base + 6h offset = FFFF_81F6h
Slave baud rate control
Enables independent slave mode baud rate at max frequency. This forces clock stretching on SCL in very
fast I2C modes.
0
1
Range address matching enable
This bit controls slave address matching for addresses between the values of the A1 and RA registers.
When this bit is set, a slave address match occurs for any address greater than the value of the A1
register and less than or equal to the value of the RA register.
0
1
Slave address
Contains the upper three bits of the slave address in the 10-bit address scheme. This field is only valid
when the ADEXT bit is set.
This read-only bitfield is reserved and always has the value zero.
I2C programmable filter factor
Controls the width of the glitch (in terms of bus clock cycles) the filter must absorb. In other words, the
filter does not allow to pass any glitch whose size is less than or equal to this width setting.
0h
1-Fh
7
0
The slave baud rate follows the master baud rate and clock stretching may occur
Slave baud rate is independent of the master baud rate
Range mode disabled. No address match occurs for an address within the range of values of the A1
and RA registers.
Range mode enabled. Address matching occurs when a slave receives an address within the range
of values of the A1 and RA registers.
No filter/bypass
Filter glitches up to width of n bus clock cycles, where n=1-15d
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
I2Cx_C2 field descriptions (continued)
0
I2Cx_FLT field descriptions
0
5
Preliminary
0
4
Description
Description
0
3
Chapter 42 Inter-Integrated Circuit (I2C)
0
2
FLT
0
1
0
0
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