mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1029

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

42.3.4 I2C Status Register (I2Cx_S)
Addresses: I2C0_S is FFFF_81C0h base + 3h offset = FFFF_81C3h
Freescale Semiconductor, Inc.
DMAEN
WUEN
RSTA
Field
Reset
Field
TCF
Read
Write
2
1
0
7
Bit
I2C1_S is FFFF_81D0h base + 3h offset = FFFF_81D3h
I2C2_S is FFFF_81E0h base + 3h offset = FFFF_81E3h
I2C3_S is FFFF_81F0h base + 3h offset = FFFF_81F3h
TCF
0
1
Repeat START
Writing a one to this bit generates a repeated START condition provided it is the current master. This bit
will always be read as zero. Attempting a repeat at the wrong time results in loss of arbitration.
Wakeup enable
The I2C module can wake the MCU from low power mode with no peripheral bus running when slave
address matching occurs.
0
1
DMA enable
The DMAEN bit enables or disables the DMA function.
0
1
Transfer complete flag
7
1
An acknowledge signal is sent to the bus on the following (if FACK is cleared) or current (if FACK is
set) receiving byte.
No acknowledge signal is sent to the bus on the following (if FACK is cleared) or current (if FACK is
set) receiving data byte.NOTE:SCL is held low until TXAK is written.
Normal operation. No interrupt generated when address matching in low power mode.
Enables the wakeup function in low power mode.
All DMA signalling disabled.
DMA transfer is enabled and the following conditions trigger the DMA request:•While FACK = 0, a
data byte is received, either address or data is transmitted. (ACK/NACK automatic)•While FACK = 0,
the first byte received matches the A1 register or is general call address.If any address matching
occurs, IAAS and TCF are set. If the direction of transfer is known from master to slave, then it is not
required to check the SRW. With this assumption, DMA can also be used in this case. In other cases,
if the master reads data from the slave, then it is required to rewrite the C1 register operation. With
this assumption, DMA cannot be used.When FACK = 1, an address or a data byte is transmitted.
IAAS
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
I2Cx_C1 field descriptions (continued)
I2Cx_S field descriptions
Table continues on the next page...
BUSY
0
5
Preliminary
ARBL
w1c
0
4
Description
Description
RAM
0
3
Chapter 42 Inter-Integrated Circuit (I2C)
SRW
0
2
IICIF
w1c
0
1
RXAK
0
0
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