mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 379

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Chapter 16 Low Leakage Wakeup Unit (LLWU)
16.4.1 LLS mode
Wakeup events triggered from either an external pin input or an internal module input
result in a CPU interrupt flow to begin user code execution.
An LLS reset event due to RESET pin assertion causes an exit via a system reset. State
retention data is lost, the I/O states return to their reset state. The RCM_SRS[WAKEUP]
and RCM_SRS[PIN] bits are set and the system executes a reset flow before CPU
operation begins with a reset vector fetch.
16.4.2 VLLS modes
In the case of a wakeup due to external pin or internal module wakeup, recovery is
always via a reset flow and the RCM_SRS[WAKEUP] is set indicating the low leakage
mode was active. State retention data is lost and I/O will be restored after the
PMC_REGSC[ACKISO] has been written.
A VLLS exit event due to RESET pin assertion causes an exit via a system reset. State
retention data is lost, the I/O states immediately return to their reset state. The
RCM_SRS[WAKEUP] and RCM_SRS[PIN] bits are set and the system executes a reset
flow before CPU operation begins with a reset vector fetch.
16.4.3 Initialization
For an enabled peripheral wakeup input, the peripheral flag should be cleared by software
before entering LLS or VLLSx mode to avoid an immediate exit from the mode.
Flags associated with external input pins (filtered and unfiltered) should also be cleared
by software prior to entry to LLS or VLLSx mode.
After enabling an external pin filter or changing the source pin, wait at least 5 LPO clock
cycles before entering LLS or VLLSx mode to allow the filter to initialize.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Freescale Semiconductor, Inc.
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