mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 514

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Flash Operation in Low-Power Modes
The flow for a generic command write sequence is illustrated in the following figure.
514
2. If the initial parameter checking passes, the command proceeds to execution. Run-
3. In the next step, results, if any, are reported back to the user via the FCCOB and
4. In the final step, the FTFL sets the FSTAT[CCIF] bit signifying that the command
time errors, such as failure to erase verify, may occur during the execution phase.
Run-time errors are reported in the FSTAT[MGSTAT0] bit. A command may have
access and run-time errors, but the run-time errors are not seen until all access errors
have been corrected.
FSTAT registers.
has completed.
Figure 23-32. Generic FTFL Command Write Sequence Flowchart
FCCOB
Availability Check
Access Error and
Protection Violation
Check
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Write to the FCCOB registers
to load the required command parameter.
no
Clear the CCIF to launch the command
Write 0x80 to FSTAT register
Read: FSTAT register
ACCERR/
no
Parameters?
no
START
= ‘1’?
CCIF
FPVIOL
Set?
EXIT
More
Preliminary
yes
Results from previous command
yes
yes
Previous command complete?
Clear the old errors
Write 0x30 to FSTAT register
Freescale Semiconductor, Inc.

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