mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 836

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Register Definition
37.3.26 Quadrature Decoder Control and Status (FTMx_QDCTRL)
This register has the control and status bits for the quadrature decoder mode.
Addresses: FTM0_QDCTRL is FFFF_8440h base + 30h offset = FFFF_8470h
836
PHAFLTREN
PHBFLTREN
PHAPOL
Field
Reset
Field
Read
Write
7
6
5
Bit
FTM1_QDCTRL is FFFF_8480h base + 30h offset = FFFF_84B0h
PHAFLTREN
Do not write to this register when the quadrature decoder
feature is not supported.
0
1
Phase A Input Filter Enable
Enables the filter for the quadrature decoder phase A input. The filter value for the phase A input is
defined by the CH(n)FVAL field of FTMFILTER. The phase A filter is also disabled when CH(n)FVAL is
zero.
0
1
Phase B Input Filter Enable
Enables the filter for the quadrature decoder phase B input. The filter value for the phase B input is
defined by the CH(n+1)FVAL field of FTMFILTER. The phase B filter is also disabled when CH(n+1)FVAL
is zero.
0
1
Phase A Input Polarity
Selects the polarity for the quadrature decoder phase A input.
0
1
7
0
Fault input is disabled.
Fault input is enabled.
Phase A input filter is disabled.
Phase A input filter is enabled.
Phase B input filter is disabled.
Phase B input filter is enabled.
Normal polarity. Phase A input signal is not inverted in FTM.
Inverted polarity. Phase A input signal is inverted in FTM.
PHBFLTREN
FTMx_FLTCTRL field descriptions (continued)
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
FTMx_QDCTRL field descriptions
PHAPOL
Table continues on the next page...
0
5
Preliminary
NOTE
PHBPOL
0
4
Description
Description
QUADMODE
0
3
QUADIR
0
2
Freescale Semiconductor, Inc.
TOFDIR
0
1
QUADEN
0
0