mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 810

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Memory Map and Register Definition
37.3.7 Modulo Low (FTMx_MODL)
See the description for the Modulo High register.
Addresses: FTM0_MODL is FFFF_8440h base + 4h offset = FFFF_8444h
37.3.8 Channel Status and Control (FTMx_CnSC)
CnSC contains the channel-interrupt-status flag and control bits used to configure the
interrupt enable, channel configuration, and pin function.
810
DECAPEN
MOD_L
Reset
Field
Read
7–0
Write
X
Bit
FTM1_MODL is FFFF_8480h base + 4h offset = FFFF_8484h
Low byte of the modulo value
7
0
COMBINE
X
Table 37-71. Mode, Edge, and Level Selection
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
CPWMS
FTMx_MODL field descriptions
X
Table continues on the next page...
0
5
Preliminary
MSnB:MSnA
XX
0
4
MOD_L
Description
ELSnB:ELSnA
0
3
00
0
2
Freescale Semiconductor, Inc.
Mode
None
0
1
Pin not used for
Configuration
FTM
0
0

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