mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 862

no-image

mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mcf51jf128VLH
Manufacturer:
MITSUBISHI
Quantity:
321
Part Number:
mcf51jf128VLH
Manufacturer:
FREESCALE
Quantity:
5 097
Part Number:
mcf51jf128VLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf51jf128VLH
Manufacturer:
FREESCALE
Quantity:
5 097
Functional Description
37.4.11 PWM Synchronization
PWM synchronization provides an opportunity to update registers with the contents of
their write buffers. It can also be used to synchronize two or more FlexTimer modules on
the same MCU.
PWM synchronization updates the MODH:L and CnVH:L registers with their write
buffers. It is also possible to force the FTM counter to its initial value and update the
CHnOM bits in OUTMASK using PWM synchronization.
37.4.11.1 Hardware Trigger
Each hardware trigger (input signals: trigger_0, trigger_1, and trigger_2) is synchronized
by the system clock.
A rising edge on the selected hardware trigger input (trigger n event) initiates PWM
synchronization. A hardware trigger is selected when its enable bit is set (TRIGn = 1
where n = 0, 1, or 2). The TRIGn bit is cleared when 0 is written to it or when the trigger
n event is detected.
If two or more hardware triggers are enabled (TRIG0 and TRIG1 = 1) and only the
trigger 1 event occurs, then only the TRIG1 bit is cleared.
If a trigger n event occurs together with a write to set the TRIGn bit, then the
synchronization is made, but the TRIGn bit remains set because of the last write.
862
• If the selected mode is output compare mode, then CnVH:L registers are updated
• If the selected mode is not output compare mode and (SYNCEN = 1), then CnVH:L
according to the SYNCEN bit. If (SYNCEN = 0), then CnVH:L registers are updated
after their second byte is written and on the next change of the FTM counter (end of
the prescaler counting). If (SYNCEN = 1), then CnVH:L registers are updated by
PWM synchronization (see “CnVH:L Registers Synchronization”).
registers are updated by PWM synchronization (see “CnVH:L Registers
Synchronization”).
• PWM synchronization is only available in combine mode.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Note
Freescale Semiconductor, Inc.

Related parts for mcf51jf128