mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 168

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Boot
Subsequent system resets follow this reset flow beginning with the step where system
clocks are enabled.
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6. When flash initialization completes, the RESET pin is released. After the RESET pin
7. When the system exits reset, the processor fetches initial 32-bit values for the
8. If FlexNVM is enabled, the Flash Controller continues to restore the FlexNVM data.
is released, if RESET continues to be asserted (an indication of a slow rise time on
the RESET pin or external drive in low), the system continues to be held in reset.
After the RESET pin is detected high, the system is released from reset.
supervisor stack pointer and program counter (PC) from the locations 0x(00)00_0000
and 0x(00)00_0004, respectively. The CPU begins execution at the PC location. At
this time:
This data is not available immediately out of reset, and the system should not access
this data until the Flash Controller completes this initialization step as indicated by
the EEERDY flag.
b. If BDM was not latched but EzPort mode was latched during the sequence,
a. If active background debug mode was latched during the sequence, BDM is
entered instead of normal CPU execution.
EzPort mode is entered instead of normal CPU execution.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Freescale Semiconductor, Inc.