mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 296

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Registers
13.2.1 System Options Register 1 (SIM_SOPT1)
The following Reset row refers to Chip POR not VLLS. Only that type of reset, or any
reset type that triggers Chip POR not VLLS, affects this register. Other reset types do not
affect this register.
Address: SIM_SOPT1 is FFFF_80C0h base + 0h offset = FFFF_80C0h
* Notes:
•
1. The value of each bit of this reserved field can be 0 or 1.
296
Reserved bitfield:The value of each bit of this reserved field can be 0 or 1.
Reserved
Reserved
REGE
SSTB
VSTB
Reset
Field
Read
4–2
1–0
Write
7
6
5
Bit
REGE
USB Voltage Regulator enable
This bit is writable when the SOPT3[RWE] bit is set.
0
1
USB Voltage Regulator standby in stop modes
This bit controls whether the USB VREG enters standby in stop, VLPS, LLS and VLLS modes. The bit is
writable when the SOPT3[SWE] bit is set.
0
1
USB Voltage Regulator standby in run/wait modes
This bit controls whether the USB VREG enters standby in VLPW and VLPR modes. The bit is writable
when the SOPT3[SWE] bit is set.
0
1
This bitfield is reserved.
The value of each bit can be 0 or 1.
This read-only bitfield is reserved and always has the value zero.
7
1
USB VREG is disabled.
USB VREG is enabled (reset value).
USB VREG does not enter standby in Stop, VLPS, LLS and VLLS modes (reset value)
USB VREG enters standby in Stop, VLPS, LLS and VLLS modes
USB VREG does not enter standby in VLPW and VLPR modes (reset value)
USB VREG enters standby in VLPW and VLPR modes
SSTB
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
SIM_SOPT1 field descriptions
VSTB
0
5
Preliminary
4
*
Description
Reserved
3
*
2
*
Freescale Semiconductor, Inc.
0
1
0
0
0