mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1140

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Registers
44.3.1 SAI Transmit Control Register (I2Sx_TCSR)
Addresses: I2S0_TCSR is FFFF_8200h base + 0h offset = FFFF_8200h
1140
Reset
Reset
FFFF_82E0
FFFF_8300
FFFF_8304
Absolute
address
Bit
Bit
W
W
(hex)
R
R
STOPE
DBGE
Field
TE
31
30
29
TE
31
15
0
0
SAI Receive Mask Register (I2S0_RMR)
SAI MCLK Control Register (I2S0_MCR)
MCLK Divide Register (I2S0_MDR)
30
14
0
0
0
Transmitter enable
Enables/disables the transmitter. When software clears this bit, the transmitter remains enabled (and this
bit remains set) until the end of the current frame.
0
1
Stop enable
Configures transmitter operation in Stop mode. This bit is ignored and the transmitter is disabled in all
low-leakage stop modes.
0
1
Debug enable
Transmitter is disabled.
Transmitter is enabled, or transmitter has been disabled and not end of frame.
Transmitter disabled in stop mode.
Transmitter enabled in stop mode.
29
13
0
0
BCE
28
12
0
0
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Register name
SEIE FEIE
27
11
0
0
I2Sx_TCSR field descriptions
I2S memory map (continued)
0
Table continues on the next page...
26
10
0
0
FR
25
0
0
0
9
Preliminary
SR
24
0
0
8
Description
23
0
0
7
22
0
0
0
0
6
(in bits)
Width
32
32
32
21
0
0
5
Access
R/W
R/W
R/W
WSF
w1c
20
0
0
4
Freescale Semiconductor, Inc.
SEF
w1c
Reset value
0000_0000h
0000_0000h
0000_0000h
19
0
0
0
3
FEF
w1c
18
0
0
2
FWF
17
0
0
1
Section/
44.3.18/
44.3.19/
44.3.20/
page
1158
1159
1160
FRF
16
0
0
0