mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1176

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Memory Map and Registers
At reset, all bits in the RGPIO_ENB register are cleared, disabling the RGPIO
functionality.
Address: RGPIO_ENB is C00000h base + 4h offset = 00C0_0004h
45.3.5 RGPIO Clear Data Register (RGPIO_CLR)
The RGPIO_CLR register provides a mechanism to clear specific bits in the
RGPIO_DATA by performing a simple write. Clearing a bit in RGPIO_CLR clears the
corresponding bit in the RGPIO_DATA register. Setting it has no effect. The
RGPIO_CLR register is write-only; reads of this address return the RGPIO_DATA
register.
Address: RGPIO_CLR is C00000h base + 6h offset = 00C0_0006h
* Notes:
1176
Reset
Reset
Read
Read
Write
Write
x = Undefined at reset.
Bit
Bit
15–0
15–0
Field
ENB
Field
CLR
15
15
x*
0
14
14
x*
0
Enable pin for RGPIO
0
1
Clear data
0
1
The corresponding package pin is configured for use as a normal GPIO pin, not an RGPIO pin.
The corresponding package pin is configured for use as an RGPIO pin.
Clears the corresponding bit in the RGPIO_DATA register.
No effect.
13
13
x*
0
12
12
x*
0
MCF51JF128 Reference Manual, Rev. 2, 03/2011
11
11
x*
0
RGPIO_ENB field descriptions
RGPIO_CLR field descriptions
10
10
x*
0
x*
0
9
9
Preliminary
x*
0
8
8
ENB
CLR
Description
Description
x*
0
7
7
x*
0
6
6
x*
0
5
5
x*
0
4
4
Freescale Semiconductor, Inc.
x*
0
3
3
x*
0
2
2
x*
0
1
1
x*
0
0
0

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