mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 460

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Initialization / Application Information
460
4. Lastly, PBE mode transitions into PEE mode:
d. PBE: Loop until S[PLLST] is set, indicating that the current source for the PLLS
b. Loop until S[CLKST] are 2'b11, indicating that the PLL output is selected to
e. PBE: Then loop until S[LOCK] is set, indicating that the PLL has acquired lock.
a. C1 = 0x10 (2'b00010000)
clock is the PLL.
feed MCGOUT in the current clock mode.
• C1[CLKS] set to 2'b00 in order to select the output of the PLL as the system
• Now, With PRDIV of divide-by-2, and C6[VDIV] of multiply-by-24,
clock source.
MCGOUT = [(4 MHz / 2) * 24] = 48 MHz.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Freescale Semiconductor, Inc.