mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 643

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Reset
Reset
Addresses: ADC0_RA is FFFF_8600h base + 10h offset = FFFF_8610h
29.3.5 Compare value registers (ADCx_CVn)
The compare value registers (CV1 and CV2) contain a compare value used to compare
with the conversion result when the compare function is enabled (ACFE=1). This register
is formatted the same for both bit position definition and value format (unsigned or sign-
extended 2's complement) as the data result registers (Rn) in the different modes of
operation. Therefore, the compare function only uses the compare value register bits that
are related to the ADC mode of operation.
The compare value 2 register (CV2) is utilized only when the compare range function is
enabled (ACREN=1).
Addresses: ADC0_CV1 is FFFF_8600h base + 18h offset = FFFF_8618h
Freescale Semiconductor, Inc.
Bit
Bit
W
W
R
R
Reserved
Reserved
31
31
0
0
31–16
31–16
15–0
15–0
Field
Field
CV
30
30
D
0
0
ADC0_RB is FFFF_8600h base + 14h offset = FFFF_8614h
ADC0_CV2 is FFFF_8600h base + 1Ch offset = FFFF_861Ch
29
29
0
0
28
28
0
0
This read-only bitfield is reserved and always has the value zero.
Data result
This read-only bitfield is reserved and always has the value zero.
Compare value
27
27
0
0
26
26
0
0
25
25
0
0
24
24
0
0
0
0
MCF51JF128 Reference Manual, Rev. 2, 03/2011
23
23
0
0
22
22
0
0
ADCx_CVn field descriptions
21
21
0
ADCx_Rn field descriptions
0
20
20
0
0
19
19
0
0
18
18
0
0
Preliminary
17
17
0
0
16
16
0
0
15
15
0
0
Description
Description
14
14
0
0
13
13
0
0
Chapter 29 Analog-to-Digital Converter (ADC)
12
12
0
0
11
11
0
0
10
10
0
0
0
0
9
9
0
0
8
8
CV
D
0
0
7
7
0
0
6
6
0
0
5
5
4
0
4
0
0
0
3
3
0
0
2
2
0
0
1
1
643
0
0
0
0

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