mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1312

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Functional Description
Figure 50-8
READ_MEM.B command is used as an example:
This process is referred to as cycle stealing. The READ_MEM.B appears as a single-
cycle operation to the processor, even though the pipelined nature of the Operand
Execution Pipeline requires multiple CPU clock cycles for it to actually complete. After
that, the debug module tracks the execution of the READ_MEM.b command as the
processor resumes the normal flow of the application program. After detecting the
READ_MEM.B command is done, the BDC issues an ACK pulse to the host controller,
indicating that the addressed byte is ready to be retrieved. After detecting the ACK pulse,
the host initiates the data-read portion of the command.
Unlike a normal bit transfer, where the host initiates the transmission by issuing a
negative edge in the BKGD pin, the serial interface ACK handshake pulse is initiated by
the target MCU. The hardware handshake protocol in
when the BKGD pin is being driven, so the host should follow these timing relationships
to avoid the risks of an electrical conflict at the BKGD pin.
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1. The 8-bit command code is sent by the host, followed by the address of the memory
2. The target BDC decodes the command and sends it to the CPU.
3. Upon receiving the BDC command request, the CPU schedules a execution slot for
4. The CPU temporarily stalls the instruction stream at the scheduled point, executes
BKGD PIN
location to be read.
the command.
the READ_MEM.B command and then continues.
shows the ACK handshake protocol in a command level timing diagram. A
READ_MEM.B
command is discarded and the ACK pulse is not issued. After
entering a stop mode, the BDC command is no longer pending
and the XCSR[CSTAT] value of 001 is kept until the next
command is successfully executed.
Figure 50-8. Handshake Protocol at Command Level
HOST
MCF51JF128 Reference Manual, Rev. 2, 03/2011
ADDRESS[23
TARGET
DEBUG DECODES
THE COMMAND
0]
Preliminary
CPU EXECUTES THE
COMMAND
READ_MEM.B
TARGET
Figure 50-8
RETRIEVED
BDC ISSUES THE
ACK PULSE (NOT TO SCALE)
BYTE IS
HOST
specifies the timing
Freescale Semiconductor, Inc.
NEW BDC COMMAND
HOST
TARGET