HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 93

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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This LSI has an on-chip clock pulse generator (CPG) that generates the system clock (φ) and
peripheral clock (Pφ) to generate the internal clock (φ/2 to φ/8192, Pφ/2 to Pφ/1024). The CPG
consists of an oscillator, PLL circuit, and pre-scaler. A block diagram of the clock pulse generator
is shown in figure 4.1. The frequency from the oscillator can be modified by the PLL circuit.
PLLCAP
EXTAL
XTAL
MD2
MD3
CK
Oscillator
Figure 4.1 Block Diagram of the Clock Pulse Generator
Section 4 Clock Pulse Generator
control circuit
Clock mode
PLL circuit
φ
Pre-scaler
φ/2 to
φ/8192
Within the LSI
Clock divider
Rev. 2.00, 09/04, page 51 of 720
Pre-scaler
(× 1/2)
Pφ/2 to
Pφ/1024
(HCAN2)
φ/2

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