HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 484

• Manufacturer Part Number: HD64F7047FW40V
• Description: MCU 5V 256K I-TEMP,PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047FW40V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.3.14 Mailbox Interrupt Mask Registers (MBIMR1, MBIMR0)
MBIMR1 and MBIMR0 are 16-bit registers that enable individual mailbox interrupt requests.
• MBIMR1
Rev. 2.00, 09/04, page 442 of 720
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
MBIMR31
MBIMR30
MBIMR29
MBIMR28
MBIMR27
MBIMR26
MBIMR25
MBIMR24
MBIMR23
MBIMR22
MBIMR21
MBIMR20
MBIMR19
MBIMR18
MBIMR17
MBIMR16
Initial Value R/W
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
When MBIMRn (n = 16 to 31) is cleared to 0, the
interrupt request in mailbox n is enabled. When set
to 1, the interrupt request is masked.
The interrupt source in a transmit mailbox is TXPRn
(n = 16 to 31) clearing caused by transmission end
or transmission abort. The interrupt source in a
receive mailbox is RXPRn (n = 16 to 31) setting
caused by reception end.
0: Interrupt request in corresponding mailbox is
1: Interrupt request in corresponding mailbox is
enabled
disabled