HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 325

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Operation when Error Occurs during PWM Mode 1 Operation, and Operation is Restarted
in Normal Mode: Figure 10.91 shows an explanatory diagram of the case where an error occurs
in PWM mode 1 and operation is restarted in normal mode after re-setting.
1. After a reset, MTU output is low and ports are in the high-impedance state.
2. Set PWM mode 1.
3. For channels 3 and 4, enable output with TOER before initializing the pins with TIOR.
4.
5. Set MTU output with the PFC.
6. The count operation is started by TSTR.
7. Output goes low on compare-match occurrence.
8. An error occurs.
9. Set port output with the PFC and output the inverse of the active level.
10. The count operation is stopped by TSTR.
11. Set normal mode.
12. Initialize the pins with TIOR.
13. Set MTU output with the PFC.
14. Operation is restarted by TSTR.
MTU module
Port output
n=0 to 15
TIOC*A
TIOC*B
compare-match occurrence. In PWM mode 1, the TIOC*B side is not initialized.)
output
Initialize the pins with TIOR. (The example shows initial high output, with low output on
PEn
PEn
Figure 10.91 Error Occurrence in PWM Mode 1, Recovery in Normal Mode
RESET
1
(PWM1)
TMDR
2
High-Z
High-Z
TOER
(1)
3
(1 init
0 out)
TIOR
4
• Not initialized (TIOC*B)
(MTU)
PFC
5
TSTR
(1)
6
Match
7
occurs
Error
8
(PORT)
PFC
9
TSTR
10
(0)
Rev. 2.00, 09/04, page 283 of 720
(normal)
TMDR
11
0 out)
TIOR
(1 init
12
(MTU)
PFC
13
TSTR
14
(1)

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