HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 479

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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HD64F7047FW40V
0
• ABACK0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
ABACK15
ABACK14
ABACK13
ABACK12
ABACK11
ABACK10
ABACK9
ABACK8
ABACK7
ABACK6
ABACK5
ABACK4
ABACK3
ABACK2
ABACK1
Initial Value R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Description
Status flags that indicate error-free cancellation of
the transmit message in the corresponding
mailboxes from 1 to 15. When the message in
mailbox n (n = 1 to 15) has been canceled error-free,
ABACKn is set to 1.
[Setting condition]
[Clearing condition]
Bit 0 is reserved. This bit is always read as 0. The
write value should always be 0.
Note: Writing operation by the CPU is valid only for
Completion of transmit message abort for
corresponding mailbox
Writing 1
clearing condition (writing 1) of set status.
Rev. 2.00, 09/04, page 437 of 720

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