HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 293

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Output Compare Output Timing: A compare match signal is generated in the final state in
which TCNT and TGR match (the point at which the count value matched by TCNT is updated).
When a compare match signal is generated, the output value set in TIOR is output at the output
compare output pin (TIOC pin). After a match between TCNT and TGR, the compare match
signal is not generated until the TCNT input clock is generated.
Figure 10.57 shows output compare output timing (normal mode and PWM mode) and Figure
10.58 shows output compare output timing (complementary PWM mode and reset synchronous
PWM mode).
External
clock
TCNT input
clock
TCNT
Figure 10.56 Count Timing in External Clock Operation (Phase Counting Mode)
TCNT input
clock
TCNT
TGR
Compare
match signal
TIOC pin
Figure 10.57 Output Compare Output Timing (Normal Mode/PWM Mode)
Falling edge
N
N
N-1
Rising edge
N+1
N
Rev. 2.00, 09/04, page 251 of 720
Falling edge
N+1

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